Senior Staff Engineer - Digital Verification
Công nghệ thông tin & truyền thông
Kỹ thuật & Sản xuất
COMPANY OVERVIEW
- Our client is a global leader in the semiconductor industry, recognized for delivering innovative and energy-efficient semiconductor solutions that enable smarter, safer, and more sustainable technologies.
- With a strong presence across Europe, Asia, and the Americas, the company serves leading customers in the automotive, industrial, power & sensor systems, IoT, and digital security sectors.
RESPONSIBILITES
- Be responsible for developing SystemVerilog – UVM testbench and solve potentially complex problems related to test bench development
- Debug failing test cases to root cause
- Be responsible for defining and writing a functional coverage model
- Participate in reviews to ensure test bench meets quality and is complete
- Contribute to verification perspective in Design and Concept meetings
- Ensure test bench meets sign-off targets, including coverage, functional safety and test bench qualification
- Develop deep understanding of complex IPs/SoCs and take end-to-end ownership of their verification
- Independently identify sub-modules that are particularly suitable for Formal Verification and apply this methodology
- Proactively help increase efficiency of verification activities and mitigate risks early
- Contribute to enhancing Verification strategy and architecture of IP/SoC testbenches.
REQUIREMENTS
- A degree in Electrical/Electronic Engineering, Computer Science or equivalent
- More than 8 years of experience within the semiconductor industry
- Proven experience of ownership of IP/SoC verification including delivering to metric targets
- Ability to understand complex design specification, derive features and test bench architectures from concept
- Capability to use industry-standard EDA tools
- Good time management skills and the ability to deliver to high-quality requirements under pressure
- Safety-first approach with ability to pay close attention to detail
- Good programming skills, e.g. in C++, Python or Perl, as well as good Linux skills
- Knowledge on functional safety ISO26262 is a plus.
- Ability to clearly report issues and progress and communicate in English
BENEFITS
- Competitive base salary
- Fixed 13th month salary
- Performance bonus
- Stock Options
- Private health care insurance
- Hybrid working models (2-3 days per week, you can work from home)
- Opportunities to work with excellent engineers in Asia and Europe.
- Cutting edge technology working environment.
The role offers competitive annual package with modern technology and international working environment. If you are interested in applying for this exciting role, please submit your most updated resume to Ms. Sophia (Van Anh) – Senior Recruitment Manager via below contacts:
- Email: vananh.nguyen@adecco.com
Ref: JN-072026-203457